1. Field of the Invention
The present invention generally relates to a voltage regulator, and specifically relates to CMOS voltage regulators used in vehicles or industrial machines and CMOS voltage regulators connected to batteries.
2. Description of the Related Art
Parasitic PN junctions are undesirably generated between a source and a well, and a drain and the well of an n-channel MOS transistor as shown in FIG. 4. Therefore, two diodes D1 and D2 are formed in the MOS transistor. In the n-channel transistor shown in FIG. 4, the p-well is connected to ground.
There is no problem when a drain voltage is higher than a well voltage. When the drain voltage is lower than the well voltage by −0.7 V or more, the PN diode D2 turns on and a large forward current flows through the diode D2.
Similarly, in a p-channel MOS transistor, when a drain voltage is higher than a well voltage by 0.7 V or more, a PN diode turns on and a large forward current flows through the diode.
In general, a well of a MOS transistor is formed on a P substrate as shown in FIG. 6. In the p-channel MOS transistor having a normal PNP junction shown in FIG. 6, a parasitic vertical PNP bipolar transistor formed by a source (p+), a well (n) and the substrate (p) is generated inside. When input side current driving power becomes lower than the output side current driving power, a current does not flow through the normal PNP junction MOS transistor, but the parasitic vertical PNP bipolar transistor turns on, through which a current I0 undesirably flows.
A scheme for inhibiting such a reverse current from an output terminal to an input terminal is proposed in a DC power supply circuit disclosed in Japanese Publication H7-69749. In the DC power supply circuit, a back gate voltage of a power MOS transistor is changed to a voltage that turns off a parasitic diode generated between a source and a drain of the power MOS transistor, in order to inhibit the reverse current from the output terminal to the input terminal.
The DC power supply circuit includes a back gate control circuit for controlling the back gate voltage so as to turn off the parasitic diode. The back gate control circuit comprises two stage inverters formed by p-channel MOS transistors and n-channel MOS transistors. The drains of the post stage p-channel and n-channel MOS transistors are connected together, and the connecting node is connected to the back gate of the power MOS transistor.
FIG. 5 is a circuit diagram of a conventional voltage regulator circuit.
In recent years and continuing, in voltage regulator products, low dropout products formed by CMOS transistors are remarkably popular because of their low current consumption. In such products, a p-channel transistor M30 is used as an output control transistor. When an input voltage Vin becomes lower than GND voltage by −0.7 V or more in a case of power shut down, for example, PN diodes formed between drains and wells in MOS transistors included in a reference voltage circuit 51 (providing a reference voltage VREF) and an operational amplifying circuit 21 are forwardly biased, and accordingly a large current flows from GND to the input Vin. This phenomenon may cause equipment malfunction or breakdown.
In order to avoid such a problem, it is generally regulated so that a voltage lower than −0.3 V is not applied to an input of the CMOS voltage regulator.
A CMOS voltage regulator has a problem in that when its output voltage becomes higher than its input voltage, a PN junction between a drain and a well in an output controlling p-channel MOS transistor is forwardly biased and a large current flows from an output terminal to an input terminal.
This phenomenon also may cause equipment malfunction or breakdown.
On the other hand, bipolar transistors with an opened base do not allow current to flow unless a considerably large voltage is applied between a collector and emitter.
Therefore, some bipolar voltage regulators have no problem even if a large reverse voltage is applied to an input. However, a forward diode has to be inserted at an input terminal, and accordingly a voltage higher than a forward voltage (a threshold voltage) has to be applied to the input terminal and low dropout products cannot be provided.
As explained above, in conventional voltage regulators having a MOS transistor, when a reverse voltage is applied to an input terminal, a forward current flows between a drain and a well in a p-channel MOS transistor, and therefore a large current flows from an output terminal to the input terminal, causing equipment malfunction and breakdown.
In a case where current driving power of an input terminal side p-channel MOS transistor is lower than the current driving power of an output terminal side p-channel MOS transistor, a parasitic diode formed by a drain and an n-well of the input terminal p-channel MOS diode turns on, or a parasitic vertical PNP bipolar transistor formed by a p-source, the n-well and a p-substrate turns on, causing equipment malfunction or breakdown.